S1D13A04
QVGA LCD Controller
The S1D13A04 is an LCD solution designed for seamless connection to a wide variety of microprocessors. The S1D13A04 integrates an LCD graphics controller with an embedded 160K byte SRAM display buffer. The LCD controller supports TFT and passive panel types and adds a Hardware Acceleration Engine to greatly improve screen drawing functions.
The S1D13A04 utilizes a guaranteed low-latency CPU architecture that provides support for microprocessors without READY/WAIT# handshaking signals. The 32-bit internal data path, write buffer and the Hardware Acceleration Engine provide high performance bandwidth into display memory allowing for fast display updates.
Additionally, products requiring a rotated display can take advantage of the SwivelView™ feature which provides hardware rotation of the display memory transparent to the software application. The S1D13A04 also provides support for Picture-in-Picture (a variable size Overlay window).
The S1D13A04's impartiality to CPU type or operating system makes it an ideal display solution for a wide variety of applications in embedded markets.
Related Information
| Product Brief v5.2 | 259.97 KB |
| Hardware Specification Rev. 7.6 | 1.74 MB |
| Register Summary Rev 1.0 | 322.57 KB |
| S5U13A04B00C Rev 1.0 Evaluation Board User Manual Rev 3.1 | 1.49 MB |
| S5U13A04B00C Design Resources | 134.25 KB |
| Programming Notes And Examples Rev 7.1 | 1.06 MB |
| Sample Code For Programming Notes | 173.55 KB |
| Initialization Source Example | 81.42 KB |
| Win32 Utilities (CFG, PLAY, and BMP) | 613.9 KB |
| Win32 Utility User Manuals | 254.14 KB |
| Source Code For Win32 Utilities | 114.9 KB |
| Interface Application Notes | 506.03 KB |
| Power Consumption Rev 1.1 | 212.27 KB |
| Errata No. X00Z-P-001 | 23.72 KB |
